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lt5503 1 5503f applicatio s u features typical applicatio u descriptio u modout 0 90 2 1 control logic gc1 gc2 gnd mx C mx + lo2 2.45ghz bpf v cc1 2v v cc2 2v 2.45ghz modulated rfout bi + bi C bq + bq C v cc mod v cc rf v cc lo1 v cc lo2 modin lt5503 v cc vga lo1 lo1in (2075mhz) lo2in (750mhz) dmode mixen moden mixer enable modulator enable 5503 ta01 vga ieee 802.11 dsss and fhss high speed wireless lan (wlan) wireless local loop (wll) pcs wireless data mmds single 1.8v to 5.25v supply direct iq modulator with integrated 90 phase shifter* four step rf power control 120mhz modulation bandwidth independent double-balanced mixer modulation accuracy insensitive to carrier input power modulator i/q inputs internally biased available in 20-lead fe package 1.2ghz to 2.7ghz direct iq modulator and mixer the lt ? 5503 is a front-end transmitter ic designed for low voltage operation. the ic contains a high frequency quadra- ture modulator with a variable gain amplifier (vga) and a balanced mixer. the modulator includes a precision 90 phase shifter which allows direct modulation of an rf signal by the baseband i and q signals. in a superheterodyne system, the mixer can be used to generate the high-frequency rf input for the modulator by mixing the systems 1st and 2nd local oscillators. the lt5503 modulator output p 1db is C3dbm at 2.5ghz. the vga allows output power reduction in three steps up to 13db with digital control. the baseband inputs are internally biased for maximum input voltage swing at low supply voltage. if needed, they can be driven with external bias voltages. 2.45ghz transmitter application, carrier for modulator generated by upmixer ssb output power vs i, q amplitude i, q differential input voltage (v p-p ) 0.01 ssb output power (dbm) 1 0 C5 C10 C15 C20 C25 C30 C35 C40 C45 5503 g04 0.1 10 5.25 vdc 3 vdc 1.8 vdc , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. *patent pending
lt5503 2 5503f 1 2 3 4 5 6 7 8 9 10 top view 20 19 18 17 16 15 14 13 12 11 bq e bq + gc1 modin v cc mod v cc rf lo1 v cc lo1 dmode mx + bi e bi + gc2 modout v cc vga v cc lo2 lo2 moden mixen mx e fe package 20-lead plastic tssop 21 supply voltage ...................................................... 5.5v control voltages .......................... e0.3v to (v cc + 0.3v) baseband voltages (bi + to bi e and bq + to bq e ) ...... 2v baseband common mode voltage .....1v to (v cc e 0.3v) lo1 input power .................................................. 4dbm lo2 input power .................................................. 4dbm modin input power ............................................. 4dbm operating temperature range .................e40 c to 85 c storage temperature range ..................e65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c t jmax = 150 c,
lt5503 3 5503f electrical characteristics v cc1 = 3vdc, 2.4ghz matching, moden = high, gc1 = gc2 = low, t a = 25 c, modrfin = 2.45ghz at ?6dbm, [i ?i b ] and [q ?q b ] = 100khz cw signal at 1v p-p differential, q leads i by 90 , unless otherwise noted. (test circuit shown in figure 2.) (note 3) (i/q modulator) parameter conditions min typ max units rf carrier input (modrfin) frequency range 2 requires appropriate matching 1.2 to 2.7 ghz input vswr z o = 50 1.3:1 input power C20 to -10 dbm baseband inputs (bi + , bi , bq + , bq ) frequency bandwidth (3db) 120 mhz differential input voltage for 1db compressed output 1 v p-p dc common-mode voltage internally biased 1.4 vdc differential input resistance 18 k input capacitance 0.8 pf gain error 0.2 db phase error 1 deg modulated rf carrier output (modrfout) output power, max gain C 6 C3 dbm output vswr z o = 50 1.5:1 image suppression C 26 C34 dbc carrier suppression C 24 C32 dbc output 1db compression C3 dbm output 3rd order intercept f i = 100khz, f q = 120khz 2 dbm output 2rd order intercept f i = 100khz, f q = 120khz 16 dbm broadband noise 20mhz offset C142 dbm/hz vga control logic (gc2, gc1) switching time 100 ns input current 2 r a input low voltage 0.4 vdc input high voltage 1.7 vdc output power attenuation gc2 = low, gc1 = high 4.5 db output power attenuation gc2 = high, gc1 = low 9 db output power attenuation gc2 = high, gc1 = high 13.5 db modulator enable (moden) low = off, high = on turn on/off time 1 r s input current 105 r a enable v cc C 0.4 vdc disable 0.4 vdc modulator power supply requirements supply voltage 1.8 5.25 vdc modulator supply current moden = high 29 38 ma modulator shutdown current moden = low 50 r a
lt5503 4 5503f note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: external component values on the final test circuit shown in figure 2 are optimized for operation in the 2.4ghz to 2.5ghz band. note 3: specifications over the C40 c to 85 c temperature range are assured by design, characterization and correlation with statistical process controls. electrical characteristics v cc2 = 3vdc, 2.4ghz matching, mixen = high, dmode = low (lo2 2 mode), t a = 25 c, lo2in = 750mhz at 18dbm, lo1in = 2075mhz at ?2dbm. mixrfout measured at 2450mhz, unless otherwise noted. (test circuit shown in figure 2.) (note 3) parameter conditions min typ max units mixer 2nd lo input (lo2in) frequency range internally matched 50 to 1000 mhz input vswr z o = 50 1.4:1 input power C20 to C12 dbm mixer 1st lo input (lo1in) frequency range 2 requires appropriate matching 1400 to 2400 mhz input vswr z o = 50 1.5:1 input 3rd order intercept C30dbm/tone, ) f = 200khz C12 dbm mixer rf output (mixrfout) frequency range 2 requires appropriate matching 1700 to 2700 mhz output vswr z o = 50 1.5:1 small-signal conversion gain p lo1 = C30dbm 5 db output power C14.7 C12.7 dbm lo1 suppression C 22 C 29 dbc output 1db compression C15 dbm broadband noise 20mhz offset C152 dbm/hz lo2 divider mode control (dmode) low = f lo2 2, high = f lo2 1 input current 1 r a input low voltage ( 2) 0.4 vdc input high voltage ( 1) v cc C 0.4 vdc mixer enable (mixen) low = off, high = on turn on/off time 1 r s input current 130 r a enable v cc C 0.4 vdc disable 0.4 vdc mixer power supply requirements supply voltage 1.8 5.25 vdc supply current ( 2 mode) dmode = low, mixen = high 11.9 15.5 ma supply current ( 1 mode) dmode = high, mixen = high 10.8 ma shutdown current mixen = low 10 r a (mixer)
lt5503 5 5503f typical perfor a ce characteristics uw modulator supply current vs supply voltage modulator shutdown current vs supply voltage moden current vs enable voltage baseband frequency response i/q amplitude = 1v p-p modrfin and modrfout return loss 2.4ghz matching typical ssb spectrum v cc1 supply voltage (v) 1.8 supply current (ma) 3.2 4.6 5.3 38 36 34 32 30 28 26 24 22 20 5503 g01 2.5 3.9 t a = 85 c t a = 25 c t a = C40 c v cc1 supply voltage (v) 1.8 shutdown current ( r a) 3.2 4.6 5.3 100 10 1 0.1 5503 g02 2.5 3.9 t a = 85 c t a = 25 c t a = C40 c moden = low moden voltage (v) 1.8 input current ( r a) 3.2 4.6 5.3 220 200 180 160 140 120 100 80 60 40 5503 g03 2.5 3.9 t a = 85 c t a = C40 c moden = v cc1 t a = 25 c i, q input frequency (mhz) output power (dbm) 1 0 C5 C10 C15 C20 C25 C30 C35 C40 5503 g05 0.1 10 image carrier desired sideband frequency (mhz) 2050 return loss (db) C20 C10 2850 5503 g06 C30 C40 2250 2450 2650 0 modrfout modrfin v cc1 = 3vdc, 2.4ghz matching, moden = high, gc1 = gc2 = low (max gain), t a = 25 c, modrfin = 2.45ghz at ?6dbm, (ii b ) and (qq b ) = 100khz sine at 1v p-p differential, q leads i by 90 , unless otherwise noted. (test circuit shown in figure 2.) (i/q modulator) frequency (mhz) 0 C10 C20 C30 C40 C50 C60 C70 C80 C90 C100 p out (dbm) 5503 g07 2449.6 2449.8 2450.0 2450.2 2450.4 2450.6 supply voltage (v) 1.8 output power (dbm) C2 C3 C4 C5 C6 2.4 3.0 3.6 4.2 5503 ta01b 4.8 5.4 p lo1 = C12dbm p lo2 = C18dbm baseband = 1v p-p t a = 25 c 2.45ghz modulated output power vs supply voltage
lt5503 6 5503f typical perfor a ce characteristics uw ssb output power vs input power v cc1 = 1.8v carrier suppression vs input power v cc1 = 1.8v ssb output power vs input power v cc1 = 3v carrier suppression vs input power v cc1 = 3v image suppression vs input power v cc1 = 3v ssb output power vs input power v cc1 = 5.25v carrier suppression vs input power v cc1 = 5.25v image suppression vs input power v cc1 = 5.25v modrfin input power (dbm) C24 C22 C20 C18 C16 C14 C12 C10 ssb output power (dbm) C2 C4 C6 C8 C10 C12 C14 C16 C18 C20 5503 g08 t a = 85 c t a = 25 c t a = C40 c modrfin input power (dbm) C24 C22 C20 C18 C16 C14 C12 C10 carrier suppression (dbc) C20 C30 C40 C50 5503 g09 t a = 85 c t a = 25 c t a = C40 c modrfin input power (dbm) C24 C22 C20 C18 C16 C14 C12 C10 image suppression (dbc) C20 C30 C40 C50 5503 g10 t a = 85 c t a = 25 c t a = C40 c modrfin input power (dbm) C24 C22 C20 C18 C16 C14 C12 C10 ssb output power (dbm) 0 C2 C4 C6 C8 C10 C12 C14 C16 C18 5503 g11 t a = 85 c t a = 25 c t a = C40 c modrfin input power (dbm) C24 C22 C20 C18 C16 C14 C12 C10 carrier suppression (dbc) C20 C30 C40 C50 5503 g12 t a = 85 c t a = 25 c t a = C40 c modrfin input power (dbm) C24 C22 C20 C18 C16 C14 C12 C10 image suppression (dbc) C20 C30 C40 C50 5503 g13 t a = 85 c t a = 25 c t a = C40 c modrfin input power (dbm) C24 C22 C20 C18 C16 C14 C12 C10 ssb output power (dbm) 0 C2 C4 C6 C8 C10 C12 C14 C16 C18 5503 g14 t a = 85 c t a = 25 c t a = C40 c modrfin input power (dbm) C24 C22 C20 C18 C16 C14 C12 C10 carrier suppression (dbc) C20 C30 C40 C50 5503 g15 t a = 85 c t a = 25 c t a = C40 c modrfin input power (dbm) C24 C22 C20 C18 C16 C14 C12 C10 image suppression (dbc) C20 C30 C40 C50 5503 g16 t a = 85 c t a = 25 c t a = C40 c image suppression vs input power v cc1 = 1.8v 2.4ghz matching, moden = high, gc1 = gc2 = low (max gain), modrfin = 2.45ghz, (ii b ) and (qq b ) = 100khz sine at 1v p-p differential, q leads i by 90 , unless otherwise noted. (test circuit shown in figure 2.) (i/q modulator)
lt5503 7 5503f typical perfor a ce characteristics uw output power vs frequency 1.2ghz matching carrier feedthrough vs frequency 1.2ghz matching ssb image vs frequency 1.2ghz matching output power vs frequency 1.9ghz matching carrier feedthrough vs frequency 1.9ghz matching ssb image vs frequency 1.9ghz matching output power vs frequency 2.4ghz matching carrier feedthrough vs frequency 2.4ghz matching ssb image vs frequency 2.4ghz matching modrfin frequency (mhz) 1000 1100 1200 1300 1400 ssb output power (dbm) 0 C2 C4 C6 C8 C10 C12 C14 C16 C18 C20 5503 g17 gc2, gc1 = 00 01 11 10 modrfin frequency (mhz) 1000 1100 1200 1300 1400 5503 g18 carrier (dbm) C30 C40 C50 C60 gc2, gc1 = 00 10 11 01 modrfin frequency (mhz) 1000 1100 1200 1300 1400 5503 g19 image (dbm) C30 C40 C50 C60 gc2, gc1 = 00 10 11 01 modrfin frequency (mhz) 1650 1750 1850 2050 1950 2150 ssb output power (dbm) 2 0 C2 C4 C6 C8 C10 C12 C14 C16 C18 5503 g20 gc2, gc1 = 00 01 10 11 modrfin frequency (mhz) 1650 1750 1850 2050 1950 2150 5503 g21 carrier (dbm) C30 C40 C50 C60 gc2, gc1 = 00 10 11 01 modrfin frequency (mhz) 1650 1750 1850 2050 1950 2150 5503 g22 image (dbm) C30 C40 C50 C60 gc2, gc1 = 00 10 11 01 modrfin frequency (mhz) 2250 2350 2450 2650 2550 ssb output power (dbm) 0 C2 C4 C6 C8 C10 C12 C14 C16 C18 5503 g23 gc2, gc1 = 00 01 10 11 modrfin frequency (mhz) 2250 2350 2450 2650 2550 5503 g24 gc2, gc1 = 00 01 10 11 carrier (dbm) C30 C40 C50 C60 modrfin frequency (mhz) 2250 2350 2450 2650 2550 5503 g25 gc2, gc1 = 00 10 11 image (dbm) C30 C40 C50 C60 01 v cc1 = 3vdc, moden = high, t a = 25 c, p modrfin = ?6dbm, (ii b ) and (qq b ) = 100khz sine at 1v p-p differential, q leads i by 90 , unless otherwise noted. (test circuit shown in figure 2.) (i/q modulator)
lt5503 8 5503f typical perfor a ce characteristics uw mixer supply current vs supply voltage (lo2 2 mode) mixer supply current vs supply voltage (lo2 1 mode) mixer shutdown current vs supply voltage rf output power vs lo1 input power (v cc2 = 1.8v) rf output power vs lo1 input power (v cc2 = 3v) rf output power vs lo1 input power (v cc2 = 5.25v) lo1 feedthrough vs lo1 input power (v cc2 = 1.8v) lo1 feedthrough vs lo1 input power (v cc2 = 3v) lo1 feedthrough vs lo1 input power (v cc2 = 5.25v) v cc2 supply voltage (v) 1.8 supply current (ma) 14 13 12 11 10 9 8 2.5 3.2 4.6 3.9 5503 g26 5.3 t a = 85 c t a = 25 c t a = C40 c v cc2 supply voltage (v) 1.8 supply current (ma) 14 13 12 11 10 9 8 2.5 3.2 4.6 3.9 5503 g27 5.3 t a = 85 c t a = 25 c t a = C40 c dmode = high v cc2 supply voltage (v) 1.8 shutdown current ( r a) 100 10 1 0.1 2.5 3.2 4.6 3.9 5503 g28 5.3 t a = 85 c t a = 25 c t a = C40 c mixen = low lo1in power (dbm) C30 mixrfout power (dbm) C6 1195 g29 C24 C18 C12 C9 C27 C21 C15 C12 C14 C16 C18 C20 C22 C24 C26 C28 t a = 85 c t a = C40 c t a = 25 c lo1in power (dbm) C30 mixrfout power (dbm) C6 1195 g30 C24 C18 C12 C9 C27 C21 C15 C12 C14 C16 C18 C20 C22 C24 C26 C28 t a = 85 c t a = C40 c t a = 25 c lo1in power (dbm) C30 mixrfout power (dbm) C6 1195 g31 C24 C18 C12 C9 C27 C21 C15 C12 C14 C16 C18 C20 C22 C24 C26 C28 t a = 85 c t a = C40 c t a = 25 c lo1in power (dbm) C30 lo1 feedthrough (dbc) C6 1195 g32 C24 C18 C12 C9 C27 C21 C15 C20 C25 C30 C35 C40 t a = 85 c t a = C40 c t a = 25 c lo1in power (dbm) C30 lo1 feedthrough (dbc) C6 1195 g33 C24 C18 C12 C9 C27 C21 C15 C20 C25 C30 C35 C40 t a = 85 c t a = C40 c t a = 25 c lo1in power (dbm) C30 lo1 feedthrough (dbc) C6 1195 g34 C24 C18 C12 C9 C27 C21 C15 C20 C25 C30 C35 C40 t a = 85 c t a = C40 c t a = 25 c 2.4ghz matching, mixen = high, dmode = low (lo2 2 mode), lo2in = 750mhz at ?8dbm, lo1in = 2075mhz. mixrfout measured at 2450mhz, unless otherwise noted. (test circuit shown in figure 2.) (mixer)
lt5503 9 5503f typical perfor a ce characteristics uw rf output power and lo1 feedthrough 1.9ghz matching small-signal conversion gain and iip3 1.9ghz matching lo1in and mixrfout return loss 1.9ghz matching rf output power and lo1 feedthrough 2.4ghz matching small-signal conversion gain and iip3 2.4ghz matching lo1 and mixrfout return loss 2.4ghz matching mixen input current vs enable voltage (mixen = v cc2 ) rf output frequency (mhz) 1650 rf output (dbm) C12 C14 C16 C18 C20 C22 0 C10 C20 C30 C40 C50 2050 5503 g35 1750 1850 1950 2150 output power lo1 feedthrough lo2in = 480mhz at C18dbm lo1in = f rf C240mhz at C12dbm lo1 (dbc) rf output frequency (mhz) 1650 conversion gain (db) 6 4 2 0 C2 C4 C3 C6 C9 C12 C15 C18 2050 5503 g36 1750 1850 1950 2150 iip3 small-signal conversion gain lo2in = 480mhz at C18dbm lo1in = f rf C240mhz at C30dbm/tone iip3 (dbm) frequency (mhz) 1100 return loss (db) 0 C5 C10 C15 C20 C25 C30 1700 2100 5503 g37 1300 1500 1900 2300 2500 lo1in mixrfout rf output frequency (mhz) 2250 rf output (dbm) C12 C14 C16 C18 C20 C22 0 C10 C20 C30 C40 C50 2650 5503 g38 2350 2450 2550 lo1 feedthrough output power lo2in = 750mhz at C18dbm lo1in = f rf C375mhz at C12dbm lo1 (dbc) rf output frequency (mhz) 2250 conversion gain (db) 6 4 2 0 C2 C4 C3 C6 C9 C12 C15 C18 2650 5503 g39 2350 2450 2550 iip3 small-signal conversion gain lo2in = 750mhz at C18dbm lo1in = f rf C375mhz at C30dbm/tone iip3 (dbm) frequency (mhz) 1450 return loss (db) 0 C5 C10 C15 C20 C25 C30 2050 2450 5503 g40 1650 1850 2250 2650 2850 lo1 mixrfout mixen voltage (v) 1.8 input current ( r a) 3.2 4.6 5.3 300 270 240 210 180 150 120 90 60 30 5503 g41 2.5 3.9 t a = 85 c t a = C40 c t a = 25 c v cc2 = 3vdc, mixen = high, dmode = low (lo2 2mode), t a = 25 c, unless otherwise noted. (test circuit shown in figure 2.) (mixer)
lt5503 10 5503f uu u pi fu ctio s bq (pin 1): negative baseband input pin of the modulator q-channel. this pin is internally biased to 1.4v, but can also be overdriven with an external dc voltage greater than 1.4v, but less than v cc C 0.4v. bq + (pin 2): positive baseband input pin of modulator q- channel. this pin is internally biased to 1.4v, but can also be overdriven with an external dc voltage greater than 1.4v, but less than v cc C 0.4v. gc1 (pin 3): gain control pin. this pin is the least significant bit of the four-step modulator gain control. modin (pin 4): modulator carrier input pin. this pin is internally biased and should be ac-coupled. an external matching network is required for a 50 source. v cc mod (pin 5): power supply pin for the i/q modulator. this pin should be externally connected to the other v cc pins and decoupled with 1000pf and 0.1 r f capacitors. v cc rf (pin 6): power supply pin for the i/q modulator input rf buffer and phase shifter. this pin should be externally connected to the other v cc pins and decoupled with 1000pf and 0.1 r f capacitors. lo1 (pin 7): mixer 1st lo input pin. this pin is internally biased and should be ac-coupled. an external matching network is required for a 50 source. v cc lo1 (pin 8): power supply pin for the mixer lo1 circuits. this pin should be externally connected to the other v cc pins and decoupled with 1000pf and 0.1 r f capacitors. dmode (pin 9): mixer 2nd lo divider mode control pin. low = divide-by-2, high = divide-by-1. mx + (pin 10): mixer positive rf output pin. this pin must be connected to v cc through an external matching net- work. mx (pin 11): mixer negative rf output pin. this pin must be connected to v cc through an external matching net- work. mixen (pin 12): mixer enable pin. when the input voltage is higher than v cc C 0.4v, the mixer circuits supplied through pins 8, 10, 11 and 15 are enabled. when the input voltage is less than 0.4v, these circuits are disabled. moden (pin 13): modulator enable pin. when the input voltage is higher than v cc C 0.4v, the modulator circuits supplied through pins 5, 6, 16 and 17 are enabled. when the input voltage is less than 0.4v, these circuits are disabled. lo2 (pin 14): mixer 2nd lo input pin. this pin is internally biased and should be ac-coupled. an external matching network is not required, but can be used for improved matching to a 50 source. v cc lo2 (pin 15): power supply pin for the mixer lo2 circuits. this pin should be externally connected to the other v cc pins and decoupled with 1000pf and 0.1 r f capacitors. v cc vga (pin 16): power supply pin for the modulator variable gain amplifier. this pin should be externally connected to the other v cc pins through a 47 resistor and decoupled with a good high frequency capacitor (2pf typical) placed close to the pin. modout (pin 17): modulator rf output pin. this pin must be externally biased to v cc through a bias choke. an external matching network is required to match to 50 . gc2 (pin 18): gain control pin. this pin is the most significant bit of the four-step modulator gain control. bi + (pin 19): positive baseband input pin of the modulator i-channel. this pin is internally biased to 1.4v, but can also be overdriven with an external dc voltage greater than 1.4v, but less than v cc C 0.4v. bi (pin 20): negative baseband input pin of the modula- tor i-channel. this pin is internally biased to 1.4v, but can also be overdriven with an external dc voltage greater than 1.4v, but less than v cc C 0.4v. exposed pad (pin 21): circuit ground return for the entire ic. this must be soldered to the printed circuit board ground plane
lt5503 11 5503f block diagra w 0 90 5503 bd mixer bias circuits modulator bias circuits lo1 buffer rf buffer control locic vga v-i v-i 2 lim lim 1 21 10 11 9 7 8 4 5 2 1 20 19 16 17 18 3 13 12 15 14 6 bq + bi + bq C mx + mx C dmode gnd (backside) bi C v cc mod v cc vga modout gc2 gc1 moden mixen v cc lo2 lo2 v cc rf modin v cc lo1 lo1
lt5503 12 5503f figure 1. test schematic for 1.2ghz, 1.9ghz and 2.4ghz applications 20 19 18 17 16 15 14 13 12 11 lo1in lo2in 1 2 3 4 5 6 7 8 9 10 lt5503 5503 f01 1 2 3 4 5 c9 c13 8.2pf c43 8.2pf mixrfout t1 bq C bq + gc1 modin v cc mod v cc rf lo1 v cc lo1 dmode mx + bi C bi + gc2 modout v cc vga v cc lo2 lo2 moden mixen mx C c5 c6 c10 c20 1000pf c16 1 r f c18 1 r f l6 l5 moden mixen c15 1 r f c17 1 r f c22 1000pf c1 2.2pf c7 c2 c19 0.01 r f c23 c14 100pf c3 gc1 gc2 modrfin modrfout c11 c12 1000pf c21 0.01 r f c4 v cc2 v cc1 v cc1 q b q i b i l3 l4 dmode r2 47 r1 l1 l2 note: v cc1 and v cc2 power the modulator and upmixer sections respectively. gnd 21 (backside) test circuit application dependent component values 1.2ghz matching (modulator only) 1.9ghz matching 2.4ghz matching l1 33nh 22nh 18nh l2 12nh 5.6nh 2.7nh l3 12nh 4.7nh 2.7nh c2, c3, c7 39pf 15pf 8.2pf c10 2.7pf 1.8pf 1.2pf c23 n/a 1.5pf 1.5pf r1 240 390 390 c4 n/a 15pf 8.2pf c5, c6 n/a 1.8pf 2.2pf c9 n/a 15pf 2.7pf c11 n/a 2.2pf 1.2pf l4 n/a 6.8nh 4.7nh l5,l6 n/a 5.6nh 2.2nh t1 n/a ldb211g9010c-001 ldb212g4005c-001
lt5503 13 5503f applicatio s i for atio wu uu the lt5503 consists of a direct quadrature modulator and a mixer. the mixer operates over the range of 1.7ghz to 2.7ghz, and the modulator operates with an output range of 1.2ghz to 2.7ghz. the lt5503 is designed specifically for high accuracy digital modulation with supply voltages as low as 1.8v. it is suitable for ieee 802.11b wireless local area network (wlan), mmds and wireless local loop (wll) transmitters. a dual-conversion rf system requires two local oscilla- tors to convert signals between the baseband and rf domains (see figure 2). the lt5503s double-balanced mixer can be used to generate the lt5503 modulators high frequency carrier input (modrfin) by mixing the systems 1st and 2nd local oscillators (lo1 and lo2). in this case, a bandpass filter is required to select the desired mixer output for the modulator input. the mixers rf differential output produces C12dbm typically at 2.45ghz and the modulator modin pin requires v C16dbm, driven single-ended. this allows approximately 4db margin for figure 2. example system block diagram for a dual conversion system 5503 f02 90 0 0 90 2 1 2 1st lo 2nd lo d/a d/a a/d a/d lt5502 lt5506 lt5500 lt5503 lna i i q q vga bandpass filter loss. the balanced output from the modu- lator is applied to a variable gain amplifier (vga) that provides a single-ended output. note that the modulator can also be used independently of the mixer, freeing the mixer to be used anywhere in the system. in this case, modrfin will be driven from an external frequency source. modulator baseband the baseband i and q inputs (bi + /bi C and bq + /bq C ) are internally biased to 1.4v to maximize the input signal range at low supply voltage. this bias voltage is stable over temperature, and increases by approximately 50mv at the maximum supply voltage. the modulator i and q inputs have very wide bandwidth (120mhz typical), making the lt5503 suitable for even the most wideband modulation applications. for best carrier suppression and lowest distortion, differential input drive should be used. single- ended drive is possible too, with the unused inputs ac- coupled to ground.
lt5503 14 5503f applicatio s i for atio wu uu ac-coupled baseband . figure 3 shows the simplified circuit schematic of a high-pass ac-coupled baseband interface. 5505 f03 18k 18k 0.8pf 0.8pf 0.8pf 0.8pf bq + bq C bi + bi C c cpl c cpl c cpl c cpl q q b i i b lt5503 figure 3. ac-coupled baseband interface with approximately 18k of differential input resistance, the suggested minimum ac-coupling capacitor can be determined using the following equation: c f cpl c = 1 18 10 3 (? ??) u where f c is the 3db cut-off frequency of the baseband input signal. a larger capacitor may be used where the settling time of charging and discharging the ac-coupling capacitor is not critical. dc-coupled baseband . the baseband inputs internal bias voltage can be overdriven with an external bias circuit. this facilitates direct interfacing to a d/a converter for faster transient response. in this case, the lt5503s baseband inputs are dc biased by the converter. the optimal v bias is 1.4v, independent of v cc . in general, the maximum v bias should be less than v cc C 0.4v. the dc load on each converter output can be approximated using the following equation where i input is the current flowing into a modulator input: i vv k input bias = < 14 9 . figure 4 shows a simplified circuit schematic for interfac- ing the lt5503s baseband inputs to the outputs of a d/a converter. oip and oin are the positive and negative baseband outputs, respectively, of the converters i-channel. similarly, oqp and oqn are the positive and negative baseband outputs, respectively, of the converters q-channel. 5505 f04 18k 18k 0.8pf 0.8pf 0.8pf 0.8pf bq + bq C bi + bi C lt5503 i input i input i input i input oip oin oqp oqn d/a figure 4. dc-coupled baseband interface modulator rf input (modrfin) the modulator rf input buffer is driven single-ended. an internal active balun circuit produces balanced signals to drive the integrated phase shifter. limiters following the phase shifter output accommodate a wide range of modrfin power, resulting in minimal degradation of modulation gain/phase accuracy performance or carrier feedthrough. this pin is easily matched to a 50 source with the simple lowpass network shown in figure 1. this pin is internally biased, therefore an ac-coupling capaci- tor is required. modulator vga (variable gain amp) the vga has two digital selection lines to provide a nominal 0db, 4.5db, 9db and 13.5db attenuation from the maximum modulator output power setting. the logic table is shown below: gc2 attenuation low high gc1 low 0db 9db high 4.5db 13.5db
lt5503 15 5503f applicatio s i for atio wu uu pin 16 should be connected externally to v cc through a low value series resistor (47 typical). to assure proper output power control, a good, local high frequency ac ground for pin 16 is essential. the modout port of the vga is an open collector configuration. an inductor with high self resonance frequency is required to connect pin 17 to v cc as a dc return path, and as a part of the output matching network. additional matching compo- nents are required to drive a 50 load as shown in figure 1. the amplifier is designed to operate in class a for low distortion performance. the typical output 1db com- pression point (p1db) is C3dbm at 2.45ghz. when the differential baseband input voltages are higher than 1v p-p , the vga operates in class ab mode, and the distortion performance of the modulator is degraded. the logic control inputs do not draw current when they are low. they draw about 2 r a each when high. mixer lo1 port the mixer lo1 input port is the linear input to the mixer. it consists of an active balun amplifier designed to operate over the 1.4ghz to 2.4ghz frequency range. there is a linear relationship between lo1 input power and mixrfout power for lo1 input levels up to approximately C20dbm. after that, the mixer output begins to compress. when operated in the recommended C14dbm to C8dbm input power range, the mixer is well compressed, which in turn creates a stable output level for the modulator input. as shown in figure 1, a simple lowpass matching network is required to match this pin to 50 . this pin is internally biased, therefore an ac-coupling capacitor is required. mixer lo2 port the mixer lo2 port is designed to operate in the 50mhz to 1000mhz range. the first stage is a limiting amplifier. this stage produces the correct output levels to drive the internal divider circuit reliably, with lo2 input levels down to C20dbm. the output of the divider then drives another stage, which in turn switches the nonlinear inputs of the double-balanced mixer. note that the mixer output will produce broadband noise if the lo2 signal level is too low. the input amplifier is designed for a good match over the entire frequency range. the only requirement (figure 1) is an external ac-coupling capacitor. mixer output ports (mx + /mx ) the mixer output is a differential open collector configura- tion. bias current is supplied to these two pins through the center tap of a balun as shown in figure 1. simple lowpass matching is used to transform each leg of the mixer output to 25 for the baluns 50 input impedance. the balun approach provides the highest output power and best lo1 suppression, but is not absolutely neces- sary. it is also possible to match each output to 50 and couple power from one output. the unused output should be terminated in the same characteristic impedance. in this case, output power is approximately 2db lower and lo1 suppression degrades to approximately 15dbc. a schematic for this approach is shown in figure 6 where inductors lb + and lb C supply bias current to the mixers differential outputs, and resistor r term terminates the unused output. 5503 f05 10 11 r term 51 lb + mx + mx C lb C v cc l5 c5 c9 c bypass c6 l6 mixrfout figure 5. 50 < mixer output matching without a balun 1.9ghz 2.4ghz l5,l6 5.6nh 2.7nh c5, c6 1.8pf 0.68pf c9 15pf 8.2pf
lt5503 16 5503f applicatio s i for atio wu uu evaluation board figure 6 shows the circuit schematic of the evaluation board. the modrfin, modrfout and mixrfout ports are matched to 50 at 2.45ghz. the lo1in port is matched to 50 at 2.1ghz and the lo2in port is internally matched. a 390 resistor is used to reduce the quality factor (q) of the modulator output and deliver an output power of C3dbm typically. a lower value resistor may be used if the desired output power is lower. for example, the output power will be 3db lower if a 200 resistor is used. inductors with high self-resonance frequency should be used for l1 to l6. for simpler evaluation in a lab environment, the evaluation board includes op amps to convert single-ended i and q input signals to differential . the op amp configuration has a voltage gain of two; therefore the peak baseband input voltage should be halved to maintain the same rf output power. the op amp configuration shown will maintain acceptable differential balance up to 10mhz typically. it is also possible to bypass the op amps and drive the modulators differential inputs directly by connecting to the four oversized vias on the board (v1, v2, v3 and v4). figure 6 also shows a table of matching network values for designs centered at 1.9ghz and1.2ghz. figure 7 shows the evaluation board with connectors and ics. figure 8 shows the test set-up with the upconverting mixer and iq modulator connected in a transmit configu- ration. refer to the demo board dc365a quick start guide for detailed testing information. rf layout tips: ? use 50 impedance transmission lines up to the matching networks, use of a ground plane is a must. ? keep the matching networks as close to the pins as possible. ? surface mount 0402 outline (or smaller) parts are recommended to minimize parasitic inductances and capacitances. ? isolate the modout pin from the lo2 input by putting the lo2 transmission line on the bottom side of the board. ? the only ground connection is through the exposed pad on the bottom of the package. this exposed pad must be soldered to the board in such a way to get complete rf contact. ? low impedance rf ground connections are essential and can only be obtained by one or more vias tying directly into the ground plane. ?v cc lines must be decoupled with low impedance, broadband capacitors to prevent instability. ? separate power supply lines should be used to isolate the modin signal and other stray signals from the modout line. if possible, power planes should be used. ? avoid use of long traces whenever possible. long rf traces in particular can lead to signal radiation and degraded isolation, as well as higher losses.
lt5503 17 5503f figure 6. evaluation circuit schematic for 1.2ghz, 1.9ghz and 2.4ghz applications 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 12 11 10 9 8 7 20 19 18 17 16 15 14 13 12 11 lo1in lo2in 5503 f06 1 2 3 4 5 *c9 mixer out t1 bq C bq + gc1 modin v cc mod v cc rf lo1 v cc lo1 dmode mx + bi C bi + gc2 modout v cc vga v cc lo2 lo2 moden mixen mx C *c5 *c6 *c10 c20 1000pf c18 1 r f *l6 *l5 c41 1 r f opt c42 1 r f opt c39 4.7 r f c17 1 r f c33 4.7 r f c27 0.01 r f c32 4.7 r f c22 1000pf c1 2.2pf *c7 c19 0.01 r f *c23 *c2 c14 100pf *c3 modrfin modrfout *c11 c12 1000pf c21 0.01 r f c13 8.2pf *c4 v cc2 v cc3 v cc2 v cc2 v cc1 v cc4 v cc4 v cc4 v cc4 v cc1 *l3 *l4 r2 47 *r1 *l1 *l2 21 c45 0.1 r f c24 4.7 r f c43 8.2pf r4 2.7k r8 2.7k r7 20k r6 20k r5 20k v1 e1 e4 e3 e2 v2 v4 v3 gnd j2 j7 j1 j4 j5 j6 j3 lt5503 C + C + C + C + r3 56 1% r25 49.9 r21 10k 1% r23 10k 1% r13 510 1% c34 4.7 r f r12 56 1% r16 510 1% r15 510 1% r14 510 1% 5 6 5 6 7 7 8 8 u2-1 lt1807 u2-2 lt1807 u3-1 lt1807 u3-2 lt1807 4 4 2 2 3 3 1 1 c35, 39pf c36, 39pf c38, 1pf c37, 1pf r19 510 1% r26 49.9 r27 49.9 r17 510 1% c40 4.7 r f c15 1 r f c16 1 r f r28 49.9 r18 510 1% r20 510 1% r22 10k 1% c29 0.01 r f c28 4.7 r f r24 10k 1% sw1 q-in r29 10 i-in *application dependent component values 1.2ghz matching (modulator only) 1.9ghz matching 2.4ghz matching l1 33nh 22nh 18nh l2 12nh 5.6nh 2.7nh l3 12nh 4.7nh 2.7nh c2, c3, c7 39pf 15pf 8.2pf c10 2.7pf 1.8pf 1.2pf c23 n/a 1.5pf 1.5pf r1 240 390 390 c4 n/a 15pf 8.2pf c5, c6 n/a 1.8pf 2.2pf c9 n/a 15pf 2.7pf c11 n/a 2.2pf 1.2pf l4 n/a 6.8nh 4.7nh l5,l6 n/a 5.6nh 2.2nh t1 n/a ldb211g9010c-001 ldb212g4005c-001 applicatio s i for atio wu uu
lt5503 18 5503f figure 7. lt5503 evaluation board layout qin iin gnd gnd v cc4 v cc2 v cc3 v cc1 v2 v1 v3 v4 lt1807 lt1807 lt5503 ic modrfin lo1in modrfout lo2in mixrfout 5503 f07 1 2 3 4 5 6 applicatio s i for atio wu uu
lt5503 19 5503f figure 8. test set-up for upconverting mixer and i/q modulator transmit chain measurements. qin iin gnd gnd v cc2 v cc3 v cc4 v2 v1 v3 v4 lt1807 lt1807 lt5503 ic modrfin lo1in modrfout lo2in mixrfout 5503 f08 C + C + C + C + 90 0 dual signal generator signal generator 1 signal generator 1 1 2 3 4 5 6 power supply 2 power supply 3 power supply 1 power supply 4 spectrum analyzer external 3db attenuator pad, or 2.45ghz bpf applicatio s i for atio wu uu information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
lt5503 20 5503f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2001 lt 1107 ? printed in usa related parts part number description comments lt5500 rf front end dual lna gain setting +13.5db/C14db at 2.5ghz, double-balanced mixer, 1.8v f v supply f 5.25v lt5502 400mhz quadrature demodulator with rssi 1.8v to 5.25v supply, 70mhz to 400mhz if, 84db limiting gain, 90db rssi range lt5504 800mhz to 2.7ghz rf measuring reciever 80db dynamic range, temperature compensated, 2.7v to 5.5v supply lt5505 300mhz to 3.5ghz rf power detector >40db dynamic range, temperature compensated, 2.7v to 6v supply lt5506 500mhz quadrature if demodulator with vga 1.8v to 5.25v supply, 40mhz to 500mhz if, C4db to 57db linear power gain ltc5507 100khz to 1ghz rf power detector 48db dynamic range, temperature compensated, 2.7v to 6v supply ltc5508 300mhz to 7ghz rf power detector sc70 package ltc5509 300mhz to 3ghz rf power detector 36db dynamic range, sc70 package lt5511 high signal level up converting mixer rf output to 3ghz, 17dbm iip3, integrated lo buffer lt5512 high signal level down converting mixer dc-3ghz, 20dbm iip3, integrated lo buffer lt5515 1.5ghz to 2.5ghz direct conversion demodulator 20dbm iip3, integrated lo quadrature generator lt5516 0.8ghz to 1.5ghz direct conversion quadrature 21.5dbm iip3, integrated lo quadrature generator demodulator lt5522 600mhz to 2.7ghz high signal level mixer 25dbm iip3 at 900mhz, 21.5dbm iip3 at 1.9ghz, matched 50 rf and lo ports, integrated lo buffer ltc5532 300mhz to 7ghz precision rf power detector precision v out offset control, adjustable gain and offset voltage package descriptio u fe package 20-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663) exposed pad variation cb fe20 (cb) tssop 0204 0.09 C 0.20 (.0035 C .0079) 0 C 8 0.25 ref recommended solder pad layout 0.50 C 0.75 (.020 C .030) 4.30 C 4.50* (.169 C .177) 134 5 6 7 8910 11 12 14 13 6.40 C 6.60* (.252 C .260) 3.86 (.152) 2.74 (.108) 20 1918 17 16 15 1.20 (.047) max 0.05 C 0.15 (.002 C .006) 0.65 (.0256) bsc 0.195 C 0.30 (.0077 C .0118) typ 2 2.74 (.108) 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 3.86 (.152) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note: 1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment 6.40 (.252) bsc

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